//========== JD9365 INX T2 10.1" initial setting ==========//
Resolution:800x1280

External system porch setting: 
VS=4;
VBP=8;
VFP=30;
HS=20;
HBP=20;
HFP=20;
Frame rate:60HZ

MIPI CLK:410Mbps(205MHZ);

Power:VCI=3.3V;
      IOVCC=1.8V;
      AVDD=5.1V;
      AVEE=-5.1V;

//-----------------------Initial  Code--------------------------------------//

//Page0
SSD_Single(0xE0,0x00);

//--- PASSWORD  ----//
SSD_Single(0xE1,0x93);
SSD_Single(0xE2,0x65);
SSD_Single(0xE3,0xF8);
SSD_Single(0x80,0x03);



//--- Page1  ----//
SSD_Single(0xE0,0x01);

//Set VCOM
SSD_Single(0x01,0x67);

//Set Gamma Power, VGMP,VGMN,VGSP,VGSN
SSD_Single(0x17,0x00);
SSD_Single(0x18,0xBF);//4.5V, D7=4.8V
SSD_Single(0x19,0x01);//0.0V
SSD_Single(0x1A,0x00);
SSD_Single(0x1B,0xBF);
SSD_Single(0x1C,0x01);
                
//Set Gate Power
SSD_Single(0x1F,0x70);	//VGH_REG=16.2V
SSD_Single(0x20,0x2D);	//VGL_REG=-12V
SSD_Single(0x21,0x2D);	//VGL_REG2=-12V
SSD_Single(0x22,0x7E);	


SSD_Single(0x35,0x28);	//SAP

SSD_Single(0x37,0x19);	//SS=1,BGR=1

//SET RGBCYC
SSD_Single(0x38,0x05);	//JDT=101 zigzag inversion
SSD_Single(0x39,0x00);
SSD_Single(0x3A,0x01);
SSD_Single(0x3C,0x7C);	//SET EQ3 for TE_H
SSD_Single(0x3D,0xFF);	//SET CHGEN_ON, modify 20140806 
SSD_Single(0x3E,0xFF);	//SET CHGEN_OFF, modify 20140806 
SSD_Single(0x3F,0x7F);	//SET CHGEN_OFF2, modify 20140806


//Set TCON
SSD_Single(0x40,0x06);	//RSO=
SSD_Single(0x41,0xA0);	//LN=640->1280 line
SSD_Single(0x43,0x1E);	//VFP=30
SSD_Single(0x44,0x0B);	//VBP=12
SSD_Single(0x45,0x28);  //HBP=40

//--- power voltage  ----//
SSD_Single(0x55,0x0F);	//DCDCM=1111
SSD_Single(0x57,0xA9);
//SSD_Single(0x58,0x0A);
SSD_Single(0x59,0x0A);	//VCL = -2.5V
SSD_Single(0x5A,0x2E);	//VGH = 16.2V
SSD_Single(0x5B,0x1A);	//VGL = -12V
SSD_Single(0x5C,0x15);	//pump clk


//--- Gamma  ----//
SSD_Single(0x5D,0x7F);
SSD_Single(0x5E,0x64);
SSD_Single(0x5F,0x53);
SSD_Single(0x60,0x47);
SSD_Single(0x61,0x43);
SSD_Single(0x62,0x33);
SSD_Single(0x63,0x37);
SSD_Single(0x64,0x21);
SSD_Single(0x65,0x39);
SSD_Single(0x66,0x37);
SSD_Single(0x67,0x34);
SSD_Single(0x68,0x50);
SSD_Single(0x69,0x3D);
SSD_Single(0x6A,0x44);
SSD_Single(0x6B,0x36);
SSD_Single(0x6C,0x34);
SSD_Single(0x6D,0x25);
SSD_Single(0x6E,0x15);
SSD_Single(0x6F,0x02);
SSD_Single(0x70,0x7F);
SSD_Single(0x71,0x64);
SSD_Single(0x72,0x53);
SSD_Single(0x73,0x47);
SSD_Single(0x74,0x43);
SSD_Single(0x75,0x33);
SSD_Single(0x76,0x37);
SSD_Single(0x77,0x21);
SSD_Single(0x78,0x39);
SSD_Single(0x79,0x37);
SSD_Single(0x7A,0x34);
SSD_Single(0x7B,0x50);
SSD_Single(0x7C,0x3D);
SSD_Single(0x7D,0x44);
SSD_Single(0x7E,0x36);
SSD_Single(0x7F,0x34);
SSD_Single(0x80,0x25);
SSD_Single(0x81,0x15);
SSD_Single(0x82,0x02);


//Page2, for GIP
SSD_Single(0xE0,0x02);

//GIP_L Pin mapping
SSD_Single(0x00,0x52);//RESET_EVEN
SSD_Single(0x01,0x55);//VSSG_EVEN 
SSD_Single(0x02,0x55);//VSSG_EVEN 
SSD_Single(0x03,0x50);//STV2_ODD  
SSD_Single(0x04,0x77);//VDD2_ODD  
SSD_Single(0x05,0x57);//VDD1_ODD  
SSD_Single(0x06,0x55);//x         
SSD_Single(0x07,0x4E);//CK11      
SSD_Single(0x08,0x4C);//CK9       
SSD_Single(0x09,0x5F);//x         
SSD_Single(0x0A,0x4A);//CK7       
SSD_Single(0x0B,0x48);//CK5       
SSD_Single(0x0C,0x55);//x         
SSD_Single(0x0D,0x46);//CK3       
SSD_Single(0x0E,0x44);//CK1       
SSD_Single(0x0F,0x40);//STV1_ODD  
SSD_Single(0x10,0x55);//x         
SSD_Single(0x11,0x55);//x         
SSD_Single(0x12,0x55);//x         
SSD_Single(0x13,0x55);//x         
SSD_Single(0x14,0x55);//x         
SSD_Single(0x15,0x55);//x         

//GIP_R Pin mapping
SSD_Single(0x16,0x53);//RESET__EVEN
SSD_Single(0x17,0x55);//VSSG_EVEN  
SSD_Single(0x18,0x55);//VSSG_EVEN  
SSD_Single(0x19,0x51);//STV2_EVEN  
SSD_Single(0x1A,0x77);//VDD2_EVEN  
SSD_Single(0x1B,0x57);//VDD1_EVEN  
SSD_Single(0x1C,0x55);//x          
SSD_Single(0x1D,0x4F);//CK12       
SSD_Single(0x1E,0x4D);//CK10       
SSD_Single(0x1F,0x5F);//x          
SSD_Single(0x20,0x4B);//CK8        
SSD_Single(0x21,0x49);//CK6        
SSD_Single(0x22,0x55);//x          
SSD_Single(0x23,0x47);//CK4        
SSD_Single(0x24,0x45);//CK2        
SSD_Single(0x25,0x41);//STV1_EVEN  
SSD_Single(0x26,0x55);//x          
SSD_Single(0x27,0x55);//x          
SSD_Single(0x28,0x55);//x          
SSD_Single(0x29,0x55);//x          
SSD_Single(0x2A,0x55);//x          
SSD_Single(0x2B,0x55);//x          
                      
//GIP_L_GS Pin mapping
SSD_Single(0x2C,0x13);//RESET_EVEN     
SSD_Single(0x2D,0x15);//VSSG_EVEN         
SSD_Single(0x2E,0x15);//VSSG_EVEN       
SSD_Single(0x2F,0x01);//STV2_ODD        
SSD_Single(0x30,0x37);//VDD2_ODD        
SSD_Single(0x31,0x17);//VDD1_ODD        
SSD_Single(0x32,0x15);//x               
SSD_Single(0x33,0x0D);//CK11            
SSD_Single(0x34,0x0F);//CK9             
SSD_Single(0x35,0x15);//x               
SSD_Single(0x36,0x05);//CK7             
SSD_Single(0x37,0x07);//CK5             
SSD_Single(0x38,0x15);//x               
SSD_Single(0x39,0x09);//CK3             
SSD_Single(0x3A,0x0B);//CK1             
SSD_Single(0x3B,0x11);//STV1_ODD        
SSD_Single(0x3C,0x15);//x               
SSD_Single(0x3D,0x15);//x               
SSD_Single(0x3E,0x15);//x               
SSD_Single(0x3F,0x15);//x               
SSD_Single(0x40,0x15);//x               
SSD_Single(0x41,0x15);//x              
                                       
//GIP_R_GS Pin mapping                 
SSD_Single(0x42,0x12);//RESET__EVEN    
SSD_Single(0x43,0x15);//VSSG_EVEN         
SSD_Single(0x44,0x15);//VSSG_EVEN       
SSD_Single(0x45,0x00);//STV2_EVEN       
SSD_Single(0x46,0x37);//VDD2_EVEN       
SSD_Single(0x47,0x17);//VDD1_EVEN       
SSD_Single(0x48,0x15);//x               
SSD_Single(0x49,0x0C);//CK12            
SSD_Single(0x4A,0x0E);//CK10            
SSD_Single(0x4B,0x15);//x               
SSD_Single(0x4C,0x04);//CK8             
SSD_Single(0x4D,0x06);//CK6             
SSD_Single(0x4E,0x15);//x               
SSD_Single(0x4F,0x08);//CK4             
SSD_Single(0x50,0x0A);//CK2              
SSD_Single(0x51,0x10);//STV1_EVEN       
SSD_Single(0x52,0x15);//x               
SSD_Single(0x53,0x15);//x               
SSD_Single(0x54,0x15);//x               
SSD_Single(0x55,0x15);//x               
SSD_Single(0x56,0x15);//x               
SSD_Single(0x57,0x15);//x               

//GIP Timing  
SSD_Single(0x58,0x40); 
SSD_Single(0x5B,0x10); 
SSD_Single(0x5C,0x06);//STV_S0 
SSD_Single(0x5D,0x40); 
SSD_Single(0x5E,0x00); 
SSD_Single(0x5F,0x00); 
SSD_Single(0x60,0x40);//ETV_W 
SSD_Single(0x61,0x03); 
SSD_Single(0x62,0x04); 
SSD_Single(0x63,0x6C);//CKV_ON 
SSD_Single(0x64,0x6C);//CKV_OFF 
SSD_Single(0x65,0x75); 
SSD_Single(0x66,0x08);//ETV_S0 
SSD_Single(0x67,0xB4); //ckv_num/ckv_w
SSD_Single(0x68,0x08); //CKV_S0
SSD_Single(0x69,0x6C);//CKV_ON
SSD_Single(0x6A,0x6C);//CKV_OFF 
SSD_Single(0x6B,0x0C); //dummy
SSD_Single(0x6D,0x00);//GGND1 
SSD_Single(0x6E,0x00);//GGND2 
SSD_Single(0x6F,0x88); 
 
SSD_Single(0x75,0xBB);//FLM_EN 
SSD_Single(0x76,0x00); 
SSD_Single(0x77,0x05); 
SSD_Single(0x78,0x2A);//FLM_OFF 



//Page4
SSD_Single(0xE0,0x04);
SSD_Single(0x09,0x11);
SSD_Single(0x0E,0x48);	//Source EQ option
SSD_Single(0x2B,0x2B);
SSD_Single(0x2D,0x03);//defult 0x01
SSD_Single(0x2E,0x44);

//Page5
SSD_Single(0xE0,0x05);
SSD_Single(0x12,0x72);//VCI GAS detect voltage

//Page0
SSD_Single(0xE0,0x00);
SSD_Single(0xE6,0x02);//WD_Timer
SSD_Single(0xE7,0x0C);//WD_Timer

//SLP OUT
SSD_Number(0x01);
SSD_CMD(0x11);  	// SLPOUT
Delayms(120);


//DISP ON
SSD_Number(0x01);
SSD_CMD(0x29);  	// DSPON
Delayms(5);






